The EP-ESE group contributes to several areas of the Upgrade of the ALICE Inner Tracking System, in close partnership with other teams in the ALICE Collaboration.

The new detector is built using more than 24,000 Monolithic Active Pixel Sensors. Engineers of the group have coordinated the development, design and implementation of the state-of-the-art ALPIDE sensor chip using a CMOS Imaging Technology.


The ALPIDE chip (left) and an FPC (right), showing wirebonding through vias to the ALPIDE chip mounted on the opposite face.

Members of EP-ESE have designed, developed and produced the Flexible Printed Circuits (FPCs) for the new ITS detector modules, fulfilling challenging electrical and mechanical integration constraints at module and system level. The assembly of Hybrid Circuits and the integration of Detector Modules of the Inner Barrel were made by ESE personnel.

                                                                                    Readout Unit for ALICE ITS

The readout of the new detector is based on the Readout Units, advanced FPGA-based electronic boards acting as data aggregators, electro-optical translators and control hubs for the front-end chips. The EP-ESE group contributed to the specifications of the board and handled the tendering and mass production of 330 Readout Units. The group is currently integrating, commissioning and debugging the boards. The EP-ESE group is heavily involved in the firmware for the main FPGA of the Readout Unit. We are responsible for the specification, implementation, verification, testing and commissioning of the circuits implementing the readout and control of the detector modules and the interfaces required by the ALICE Central Systems (Trigger, Readout, Detector Control). In addition, the Readout Unit boards will operate inside the ALICE magnet and be exposed to radiation. This requires the identification and employment of redundancy and periodic reconfiguration techniques to mitigate the effects of radiation on the FPGA circuits.

The ALICE ITS team, including members of EP-ESE, has made several beam tests to characterize and mitigate the effects of radiation on the board and on the FPGA circuits.

The EP-ESE group specified the off-detector electronic infrastructure and the electrical services. Custom boards for the power distribution have been conceived to address severe constraints of space on the installation of the off-detector electronics. We also managed the installation of services in the commissioning system and supervise the installation of the electrical services of the new detector in the cavern, developing ad-hoc test circuits and procedures.

Members of ESE are involved in the studies and developments for a new ITS3 detector pursued by the ALICE Collaboration as a future replacement of the three innermost layers of the ITS. This further upgrade promises to enhance the detector performance and leverages the know-how acquired on monolithic pixel sensors and electro-mechanical integration. Engineers of the group coordinate the developments on a path towards an ultra-thin, ultra-low power wafer-scale sensor chip to be implemented employing stitching in a 65 nm CMOS Imaging Technology.